FIG. 1 shows a conventional digital non-isolated buck switching mode power supply 100, in which an output stage 102 converts an input voltage Vi to an output voltage Vo for a load 122, an error amplifier 110 compares the output voltage Vo with a reference voltage Vref to produce an error signal Ve, an analog-to-digital converter (ADC) 108 converts the analog error signal Ve to a digital error signal Ve′, a compensator 106 receives and calculates the digital error signal Ve′ to produce a digital signal Vd, and a digital pulse width modulator (DPWM) 104 produces a pulse width modulation signal pwm_o to drive the output stage 102 according to the digital signal Vd. In the output stage 102, two switches 114 and 118, for example power transistors, are coupled in series between the power input Vi and ground GND, two diodes 116 and 120 are shunt to the switches 114 and 118 respectively, a pulse width modulator (PWM) driver 112 switches the switches 114 and 118 according to the PWM signal pwm_o to produce an inductor current IL to charge a capacitor C to produce the output voltage Vo.
The compensator 106 is used to stabilize the switching mode power supply 100, and a good compensator 106 can make the switching mode power supply 100 have enough phase margin for loop stability, enough direct current (DC) gain to achieve error free, and larger bandwidth for quick response when the load 122 changes. On the contrary, a bad compensator 106 will decrease the efficiency of the switching mode power supply 100. For more details about analog compensators, it may refer to “Fundamentals of Power Electronics,” Kluwer Academic Publishers, 2001, and for more details about digital compensators, it may refer to “Impact of Digital Control in Power Electronics,” Proceeding of 2004 International Symposium on Power Semiconductor Devices & Ics, pp. 13-22, and “Designing a TMS320F280x Based Digitally Controlled DC-DC Switching Power Supply,” Texas Instruments Application Report, July 2005.
However, the conventional compensator 106 is designed based on the mathematical model of the module provided by the given specification of the switching mode power supply, and the small signal model using an average state space method to approximate to a switching mode power supply, so the non-ideal effects of the elements in the switching mode power supply 100 can't be taken into consideration before designing the conventional compensator 106. For this reason, the design of the compensator 106 can't be optimized, and therefore the conventional compensator 106 can merely compensate the switching mode power supply 100 roughly for essentially ensuring that the switching mode power supply 100 can work stably. Even though the non-ideal effects of the elements will reflect on the transient or frequency response of the switching mode power supply 100, they could be measured only when the switching mode power supply 100 operates at stable state; in other words, the transient or frequency response of the conventional switching mode power supply 100 can't be measured before designing the compensator 106. Besides, even though the open-loop gain of the switching mode power supply 100 at stable state can be measured after designing the compensator 106 to provide the reference data for improving the compensator 106, the trial-and-error is needed to improve the bandwidth of the switching mode power supply 100, which is a labor job.
Therefore, it is desired a method for efficiently designing a good compensator for a digital switching mode power supply.